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  1 ltc3 4 0 6b-2 3406b2f n high efficiency: up to 96% n 600ma output current at v in = 3v n 2.5v to 5.5v input voltage range n 2.25mhz constant frequency operation n no schottky diode required n low dropout operation: 100% duty cycle n low quiescent current: 350 m a n 0.6v reference allows low output voltages n shutdown mode draws < 1 m a supply current n current mode operation for excellent line and load transient response n overtemperature protected n low profile (1mm) sot-23 package the ltc ? 3406b-2 is a high efficiency monolithic synchro- nous buck regulator using a constant frequency, current mode architecture. supply current with no load is 350 m a, dropping to <1 m a in shutdown. the 2.5v to 5.5v input voltage range makes the LTC3406B-2 ideally suited for single li-ion battery-powered applications. 100% duty cycle capability provides low dropout operation, extend- ing battery life in portable systems. pwm pulse skipping mode operation provides very low output ripple voltage for noise sensitive applications. the switching frequency is internally set at 2.25mhz, allow- ing the use of tiny surface mount inductors and capacitors. the internal synchronous switch increases efficiency and eliminates the need for an external schottky diode. low output voltages are easily supported with the 0.6v feedback reference voltage. the LTC3406B-2 is available in a low pro- file (1mm) sot-23 package. refer to ltc3406 for appli- cations that require burst mode ? operation. n cellular telephones n personal information appliances n wireless and dsl modems n digital still cameras n mp3 players n portable instruments 2.25mhz, 600ma synchronous step-down regulator in thinsot tm , ltc and lt are registered trademarks of linear technology corporation. burst mode is a registered trademark of linear technology corporation. thinsot is a trademark of linear technology corporation. features applicatio s u typical applicatio u descriptio u high efficiency step-down converter efficiency vs load current v in 4.7 f cer v in 2.7v to 5.5v LTC3406B-2 run 2.2 h* 3406b ta01a sw v fb gnd 10 f cer v out 1.8v 600ma 22pf 1m 499k output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b ta01b 1 100 v in = 2.7v v out = 1.8v t a = 25 c v in = 3.6v v in = 4.2v
2 ltc3 4 0 6b-2 3406b2f symbol parameter conditions min typ max units i vfb feedback current 30 na v fb regulated feedback voltage (note 4) t a = 25 c 0.5880 0.6 0.6120 v (note 4) 0 c t a 85 c 0.5865 0.6 0.6135 v (note 4) C40 c t a 85 c l 0.5850 0.6 0.6150 v d v fb reference voltage line regulation v in = 2.5v to 5.5v (note 4) l 0.04 0.4 %/v d v ovl d output overvoltage lockout d v ovl = v ovl C v fb , ltc3406b l 20 50 80 mv i pk peak inductor current v in = 3v, v fb = 0.5v or v out = 90%, 0.75 1 1.25 a duty cycle < 35% v loadreg output voltage load regulation 0.5 % v in input voltage range l 2.5 5.5 v i s input dc bias current (note 5) v fb = 0.5v or v out = 90% 350 500 m a shutdown v run = 0v, v in = 4.2v 0.1 1 m a f osc oscillator frequency v fb = 0.6v or v out = 100% l 1.8 2.25 2.7 mhz v fb = 0v or v out = 0v 310 khz r pfet r ds(on) of p-channel fet i sw = 100ma 0.4 0.5 w r nfet r ds(on) of n-channel fet i sw = C100ma 0.35 0.45 w i lsw sw leakage v run = 0v, v sw = 0v or 5v, v in = 5v 0.01 1 m a v run run threshold l 0.3 1 1.5 v i run run leakage current l 0.01 1 m a LTC3406B-2es5 t jmax = 125 c, q ja = 250 c/ w, q jc = 90 c/ w order part number input supply voltage .................................. C 0.3v to 6v run, v fb voltages ..................................... C 0.3v to v in sw voltage (dc) ......................... C 0.3v to (v in + 0.3v) p-channel switch source current (dc) ............. 800ma n-channel switch sink current (dc) ................. 800ma peak sw sink and source current ........................ 1.3a operating temperature range (note 2) .. C 40 c to 85 c maximum junction temperature (notes 3, 6) ..... 125 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c s5 part marking consult ltc marketing for parts specified with wider operating temperature ranges. ltagh absolute axi u rati gs w ww u package/order i for atio uu w (note 1) the l denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. v in = 3.6v unless otherwise specified. electrical characteristics run 1 gnd 2 sw 3 5 v fb 4 v in top view s5 package 5-lead plastic tsot-23 note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the LTC3406B-2es5 is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the C40 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula: LTC3406B-2es5: t j = t a + (p d )(250 c/w) note 4: the LTC3406B-2es5 is tested in a proprietary test mode that connects v fb to the output of the error amplifier. note 5: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. note 6: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125 c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability.
3 ltc3 4 0 6b-2 3406b2f typical perfor a ce characteristics uw efficiency vs input voltage efficiency vs output current efficiency vs output current efficiency vs output current reference voltage vs temperature oscillator frequency vs temperature (from figure 1a except for the resistive divider resistor values) temperature ( c) ?0 reference voltage (v) 0.614 0.609 0.604 0.599 0.594 0.589 0.584 25 75 ?5 0 50 100 125 v in = 3.6v 3406b g05 temperature ( c) ?0 frequency (mhz) 2.55 2.40 2.25 2.10 1.95 25 75 ?5 0 50 100 125 v in = 3.6v 3406b g06 input voltage (v) 2 efficiency (%) 6 3406b g01 3 4 5 100 95 90 85 80 75 70 65 i out = 600ma i out = 100ma i out = 10ma t a = 25 c output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b g02 1 100 v out = 1.2v t a = 25 c v in = 2.7v v in = 4.2v v in = 3.6v output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b g03 1 100 v out = 1.5v t a = 25 c v in = 2.7v v in = 4.2v v in = 3.6v output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b g04 1 100 v out = 2.5v t a = 25 c v in = 2.7v v in = 4.2v v in = 3.6v oscillator frequency vs supply voltage output voltage vs load current r ds(on ) vs input voltage supply voltage (v) 2 oscillator frequency (mhz) 2.70 2.55 2.40 2.25 2.10 1.95 1.80 34 56 3406b g07 t a = 25 c input voltage (v) 1 0 0.4 0.5 0.7 46 3406b g09 0.3 0.2 23 57 0.1 0 0.6 r ds(on) ( ) main switch synchronous switch t a = 25 c load current (ma) 0 output voltage (v) 500 200 300 400 600 800 100 1.844 1.834 1.824 1.814 1.804 1.794 1.784 1.774 3406b g08 900 700 v in = 3.6v t a = 25 c
4 ltc3 4 0 6b-2 3406b2f typical perfor a ce characteristics uw (from figure 1a except for the resistive divider resistor values) r ds(on) vs temperature dynamic supply current vs supply voltage dynamic supply current vs temperature switch leakage vs temperature switch leakage vs input voltage discontinuous operation temperature ( c) ?0 0.4 0.5 0.7 25 75 3406b g10 0.3 0.2 ?5 0 50 100 125 0.1 0 0.6 r ds(on) ( ) main switch synchronous switch v in = 2.7v v in = 3.6v v in = 4.2v temperature ( c) ?0 switch leakage (na) 200 250 300 25 75 3406b g13 150 100 ?5 0 50 100 125 50 0 v in = 5.5v run = 0v main switch synchronous switch input voltage (v) 0 0 switch leakage (pa) 20 40 60 80 120 1 234 3406b g14 56 100 run = 0v t a = 25 c synchronous switch main switch supply voltage (v) 2 dynamic supply current ( a) 6 3406b g11 3 4 5 2.5 3.5 4.5 5.5 450 430 410 390 370 350 330 310 290 270 250 v out = 1.8v i load = 0a t a = 25 c temperature ( c) ?0 390 370 350 330 310 290 270 250 3406b g12 0 50 100 125 dynamic supply current ( a) v in = 3.6v v out = 1.8v i load = 0a sw 2v/div v out 10mv/div ac coupled i l 100ma/div 1 s/div v in = 3.6v v out = 1.8v i load = 50ma 3406b g15 start-up from shutdown load step load step run 5v/div v out 1v/div ac coupled i l 500ma/div 40 s/div v in = 3.6v v out = 1.8v i load = 600ma (load: 3 resistor) 3406b g16 v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v v out = 1.8v i load = 0ma to 600ma 3406b g17 v out 100mv/div ac coupled i load 500ma/div i l 500ma/div 20 s/div v in = 3.6v v out = 1.8v i load = 50ma to 600ma 3406b g18
5 ltc3 4 0 6b-2 3406b2f typical perfor a ce characteristics uw (from figure 1a except for the resistive divider resistor values) load step load step uu u pi fu ctio s run (pin 1): run control input. forcing this pin above 1.5v enables the part. forcing this pin below 0.3v shuts down the device. in shutdown, all functions are disabled drawing <1 m a supply current. do not leave run floating. gnd (pin 2): ground pin. sw (pin 3): switch node connection to inductor. this pin connects to the drains of the internal main and synchro- nous power mosfet switches. v in (pin 4): main supply pin. must be closely decoupled to gnd, pin 2, with a 2.2 m f or greater ceramic capacitor. v fb (pin 5): feedback pin. receives the feedback voltage from an external resistive divider across the output. v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v v out = 1.8v i load = 100ma to 600ma 3406b g19 v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v v out = 1.8v i load = 200ma to 600ma 3406b g20
6 ltc3 4 0 6b-2 3406b2f fu ctio al diagra u u w + + + ea + i rcmp + i comp 5 1 run osc slope comp osc freq shift 0.6v 0.65v ovdet ov 0.6v ref shutdown v in v fb v in s r rs latch switching logic and blanking circuit anti- shoot- thru q q 5 4 sw 3 gnd 3406b bd 2 operatio u (refer to functional diagram) main control loop the LTC3406B-2 uses a constant frequency, current mode step-down architecture. both the main (p-channel mosfet) and synchronous (n-channel mosfet) switches are internal. during normal operation, the internal top power mosfet is turned on each cycle when the oscillator sets the rs latch, and turned off when the current comparator, i comp , resets the rs latch. the peak inductor current at which i comp resets the rs latch, is controlled by the output of error amplifier ea. when the load current increases, it causes a slight decrease in the feedback voltage, fb, rela- tive to the 0.6v reference, which in turn, causes the ea amplifiers output voltage to increase until the average inductor current matches the new load current. while the top mosfet is off, the bottom mosfet is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator i rcmp , or the beginning of the next clock cycle. the comparator ovdet guards against transient over- shoots >6.25% by turning the main switch off and keeping it off until the fault is removed. pulse skipping mode operation at light loads, the inductor current may reach zero or re- verse on each pulse. the bottom mosfet is turned off by the current reversal comparator, i rcmp , and the switch voltage will ring. this is discontinuous mode operation, and is normal behavior for the switching regulator. at very light loads, the LTC3406B-2 will automatically skip pulses in pulse skipping mode operation to maintain output regu- lation. refer to ltc3406 data sheet if burst mode opera- tion is preferred. short-circuit protection when the output is shorted to ground, the frequency of the oscillator is reduced to about 310khz, 1/7 the nominal
7 ltc3 4 0 6b-2 3406b2f operatio u (refer to functional diagram) frequency. this frequency foldback ensures that the in- ductor current has more time to decay, thereby preventing runaway. the oscillators frequency will progressively increase to 2.25mhz when v fb rises above 0v. dropout operation as the input supply voltage decreases to a value approach- ing the output voltage, the duty cycle increases toward the maximum on-time. further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. the output voltage will then be determined by the input voltage minus the voltage drop across the p-channel mosfet and the inductor. supply voltage (v) 2.5 maximum output current (ma) 1200 1000 800 600 400 200 0 3.0 3.5 4.0 4.5 3406b f02 5.0 5.5 v out = 1.8v v out = 1.5v v out = 2.5v figure 2. maximum output current vs input voltage figure 1a. high efficiency step-down converter figure 1b. efficiency vs load current v in c in ** 4.7 f cer v in 2.7v to 5.5v * ** ? LTC3406B-2 run 2.2 h* 3406b f01a murata lqh32cn2r2m33 taiyo yuden jmk212bj475mg taiyo yuden jmk316bj106ml sw v fb gnd c out ? 10 f cer v out 1.8v 600ma 22pf 1m 499k output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b f01b 1 100 v in = 2.7v v out = 1.8v t a = 25 c v in = 3.6v v in = 4.2v an important detail to remember is that at low input supply voltages, the r ds(on) of the p-channel switch increases (see typical performance characteristics). therefore, the user should calculate the power dissipation when the LTC3406B-2 is used at 100% duty cycle with low input voltage (see thermal considerations in the applications information section). low supply operation the LTC3406B-2 will operate with input supply voltages as low as 2.5v, but the maximum allowable output current is reduced at this low voltage. figure 2 shows the reduction in the maximum output current as a function of input voltage for various output voltages. slope compensation and inductor peak current slope compensation provides stability in constant fre- quency architectures by preventing subharmonic oscilla- tions at high duty cycles. it is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. normally, this results in a reduction of maximum inductor peak current for duty cycles > 40%. however, the LTC3406B-2 uses a patent-pending scheme that counteracts this compensat- ing ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles.
8 ltc3 4 0 6b-2 3406b2f applicatio s i for atio wu uu the basic LTC3406B-2 application circuit is shown in figure 1. external component selection is driven by the load requirement and begins with the selection of l fol- lowed by c in and c out . inductor selection for most applications, the value of the inductor will fall in the range of 1 m h to 4.7 m h. its value is chosen based on the desired ripple current. large value inductors lower ripple current and small value inductors result in higher ripple currents. higher v in or v out also increases the ripple current as shown in equation 1. a reasonable starting point for setting ripple current is d i l = 240ma (40% of 600ma). d= ()( ) - ? ? ? ? i fl v v v l out out in 1 1 (1) the dc current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. thus, a 720ma rated inductor should be enough for most applications (600ma + 120ma). for better efficiency, choose a low dc-resis- tance inductor. inductor core selection different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy mate- rials are small and dont radiate much energy, but gener- ally cost more than powdered iron core inductors with similar electrical characteristics. the choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/emi requirements than on what the LTC3406B-2 requires to operate. table 1 shows some typical surface mount inductors that work well in LTC3406B-2 applications. c in and c out selection in continuous mode, the source current of the top mosfet is a square wave of duty cycle v out /v in . to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current must be used. the maximum rms capacitor current is given by: ci vvv v in omax out in out in required i rms @ - () [] 12 / table 1. representative surface mount inductors part value dcr max dc size number ( m h) ( w max) current (a) wxlxh (mm 3 ) sumida 1.5 0.068 0.90 3.2 x 3.2 x 1.2 cdrh2d11 2.2 0.098 0.78 3.3 0.123 0.60 sumida 2.2 0.041 0.85 3.2 x 3.2 x 2.0 cdrh2d18/ld 3.3 0.054 0.75 4.7 0.078 0.63 sumida 2.2 0.116 0.95 3.5 x 4.1 x 0.8 cmd4d06 3.3 0.174 0.77 4.7 0.216 0.75 murata 1.0 0.060 1.00 2.5 x 3.2 x 2.0 lqh32c 2.2 0.097 0.79 4.7 0.150 0.65 taiyo yuden 1.0 0.080 0.78 1.8 x 2.5 x 1.8 lqlbc2518 1.5 0.110 0.66 2.2 0.130 0.60 toko 2.2 0.14 1.14 4.6 x 4.6 x 1.2 d412f 3.3 0.20 0.90 4.7 0.22 0.80 this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is com- monly used for design because even significant deviations do not offer much relief. note that the capacitor manufacturers ripple current ratings are often based on 2000 hours of life. this makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. always consult the manufac- turer if there is any question. the selection of c out is driven by the required effective series resistance (esr). typically, once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. the output ripple d v out is deter- mined by: v r r out =+ ? ? ? ? 06 1 2 1 . where f = operating frequency, c out = output capacitance and d i l = ripple current in the inductor. for a fixed output voltage, the output ripple is highest at maximum input voltage since d i l increases with input voltage.
9 ltc3 4 0 6b-2 3406b2f aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. in the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalum. these are specially constructed and tested for low esr so they give the lowest esr for a given volume. other capacitor types include sanyo poscap, kemet t510 and t495 series, and sprague 593d and 595d series. consult the manufacturer for other specific recommendations. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. because the LTC3406B-2s control loop does not depend on the output capacitors esr for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. however, care must be taken when ceramic capacitors are used at the input and the output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in , large enough to damage the part. when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage charac- teristics of all the ceramics for a given value and size. output voltage programming the output voltage is set by a resistive divider according to the following formula: v r r out =+ ? ? ? ? 06 1 2 1 . (2) the external resistive divider is connected to the output, allowing remote voltage sensing as shown in figure 3. applicatio s i for atio wu uu figure 3. setting the LTC3406B-2 output voltage v fb gnd LTC3406B-2 0.6v v out 5.5v r2 r1 3406b f03 efficiency considerations the efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. efficiency can be expressed as: efficiency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percentage of input power. although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3406B-2 circuits: v in quiescent current and i 2 r losses. the v in quiescent current loss dominates the efficiency loss at very low load currents whereas the i 2 r loss dominates the efficiency loss at medium to high load currents. in a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in figure 4. figure 4. power lost vs load current load current (ma) power loss (w) 0.1 10 100 1000 3406b f04 1 1 0.1 0.01 0.001 0.0001 v out = 1.2v v out = 1.8v v out = 2.5v v out = 1.5v v in = 3.6v
10 ltc3 4 0 6b-2 3406b2f applicatio s i for atio wu uu 1. the v in quiescent current is due to two components: the dc bias current as given in the electrical character- istics and the internal main switch and synchronous switch gate charge currents. the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each time the gate is switched from high to low to high again, a packet of charge, dq, moves from v in to ground. the resulting dq/dt is the current out of v in that is typically larger than the dc bias current. in continuous mode, i gatechg = f(q t + q b ) where q t and q b are the gate charges of the internal top and bottom switches. both the dc bias and gate charge losses are proportional to v in and thus their effects will be more pronounced at higher supply voltages. 2. i 2 r losses are calculated from the resistances of the internal switches, r sw , and external inductor r l . in continuous mode, the average output current flowing through inductor l is chopped between the main switch and the synchronous switch. thus, the series resistance looking into the sw pin is a function of both top and bottom mosfet r ds(on) and the duty cycle (dc) as follows: r sw = (r ds(on)top )(dc) + (r ds(on)bot )(1 C dc) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance charateristics curves. thus, to obtain i 2 r losses, simply add r sw to r l and multiply the result by the square of the average output current. other losses including c in and c out esr dissipative losses and inductor core losses generally account for less than 2% total additional loss. thermal considerations in most applications the LTC3406B-2 does not dissipate much heat due to its high efficiency. but, in applications where the LTC3406B-2 is running at high ambient tem- perature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. if the junction temperature reaches approximately 150 c, both power switches will be turned off and the sw node will become high impedance. to avoid the LTC3406B-2 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. the goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. the tempera- ture rise is given by: t r = (p d )( q ja ) where p d is the power dissipated by the regulator and q ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature, t j , is given by: t j = t a + t r where t a is the ambient temperature. as an example, consider the LTC3406B-2 in dropout at an input voltage of 2.7v, a load current of 600ma and an ambient temperature of 70 c. from the typical perfor- mance graph of switch resistance, the r ds(on) of the p-channel switch at 70 c is approximately 0.52 w . there- fore, power dissipated by the part is: p d = i load 2 ? r ds(on) = 187.2mw for the sot-23 package, the q ja is 250 c/ w. thus, the junction temperature of the regulator is: t j = 70 c + (0.1872)(250) = 116.8 c which is below the maximum junction temperature of 125 c. note that at higher supply voltages, the junction tempera- ture is lower due to reduced switch resistance (r ds(on) ). checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to ( d i load ? esr), where esr is the effective series resistance of c out . d i load also begins to charge or discharge c out , which generates a feedback error signal. the regulator loop then acts to return v out to its steady- state value. during this recovery time v out can be moni- tored for overshoot or ringing that would indicate a stability problem. for a detailed explanation of switching control loop theory, see application note 76.
11 ltc3 4 0 6b-2 3406b2f applicatio s i for atio wu uu a second, more severe transient is caused by switching in loads with large (>1 m f) supply bypass capacitors. the discharged bypass capacitors are effectively put in parallel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. the only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 ? c load ). thus, a 10 m f capacitor charging to 3.3v would require a 250 m s rise time, limiting the charging current to about 130ma. pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3406B-2. these items are also illustrated graphically in figures 5 and 6. check the following in your layout: 1. the power traces, consisting of the gnd trace, the sw trace and the v in trace should be kept short, direct and wide. 2. does the v fb pin connect directly to the feedback resistors? the resistive divider r1/r2 must be con- nected between the (+) plate of c out and ground. 3. does the (+) plate of c in connect to v in as closely as possible? this capacitor provides the ac current to the internal power mosfets. 4. keep the switching node, sw, away from the sensitive v fb node. 5. keep the (C) plates of c in and c out as close as possible. figure 5. LTC3406B-2 layout diagram figure 6. LTC3406B-2 suggested layout run LTC3406B-2 gnd sw l1 r2 r1 c fwd bold lines indicate high current paths v in v out 3406b f05 4 5 1 3 + 2 v fb v in c in + c out LTC3406B-2 gnd 3406b f06 pin 1 v out v in via to v out sw via to v in via to gnd c out c in l1 r2 c fwd r1
12 ltc3 4 0 6b-2 3406b2f v in c in ? 4.7 f cer v in 2.7v to 4.2v LTC3406B-2 run 3 2.2 h* 22pf 1m 316k 3406b f07a 5 4 1 2 sw v fb gnd c out ** 10 f cer v out 2.5v *murata lqh32cn2r2m33 ** taiyo yuden jhk316bj106ml ? taiyo yuden jmk212bj475mg figure 7b figure 7a design example as a design example, assume the LTC3406B-2 is used in a single lithium-ion battery-powered cellular phone application. the v in will be operating from a maximum of 4.2v down to about 2.7v. the load current requirement is a maximum of 0.6a but most of the time it will be in standby mode, requiring only 2ma. efficiency at both low and high load currents is important. output voltage is 2.5v. with this information we can calculate l using equation (1), l fi v v v l out out in = () d () - ? ? ? ? 1 1 (3) substituting v out = 2.5v, v in = 4.2v, d i l = 240ma and f = 2.25mhz in equation (3) gives: l v mhz ma v v h =- ? ? ? ? =m 25 1 5 240 1 25 42 187 . .( ) . . . a 2.2 m h inductor works well for this application. for best efficiency choose a 720ma or greater inductor with less than 0.2 w series resistance. c in will require an rms current rating of at least 0.3a @ i load(max) /2 at temperature and c out will require an esr of less than 0.25 w . in most cases, a ceramic capacitor will satisfy this requirement. for the feedback resistors, choose r1 = 316k. r2 can then be calculated from equation (2) to be: r v rk out 2 06 1 1 1000 =- ? ? ? ? = . figure 7 shows the complete circuit along with its effi- ciency curve. applicatio s i for atio wu uu output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b g04 1 100 v out = 2.5v t a = 25 c v in = 2.7v v in = 4.2v v in = 3.6v
13 ltc3 4 0 6b-2 3406b2f typical applicatio s u single li-ion 1.2v/600ma regulator for high efficiency and small footprint v in c in ? 4.7 f cer v in 2.7v to 4.2v LTC3406B-2 run 3 2.2 h* 22pf 301k 301k 3406b ta09 5 4 1 2 sw v fb gnd c out ** 10 f cer v out 1.2v *murata lqh32cn2r2m33 ** taiyo yuden jhk316bj106ml ? taiyo yuden jmk212bj475mg efficiency vs output current load step load step output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b g02 1 100 v out = 1.2v t a = 25 c v in = 2.7v v in = 4.2v v in = 3.6v v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v v out = 1.2v i load = 0ma to 600ma 3406b ta11 v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v v out = 1.2v i load = 100ma to 600ma 3406b ta12
14 ltc3 4 0 6b-2 3406b2f v in c in ? 4.7 f cer v in 5v LTC3406B-2 run 3 2.2 h* 22pf 1m 221k 3406b ta13 5 4 1 2 sw v fb gnd c out ** 10 f cer v out 3.3v *murata lqh32cn2r2m33 ** taiyo yuden jhk316bj106ml ? taiyo yuden jmk212bj475mg 5v input to 3.3v/0.6a regulator typical applicatio s u output current (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 30 20 10 3406b ta14 1 100 v out = 3.3v v in = 5v efficiency vs output current load step load step v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v v out = 3.3v i load = 0ma to 600ma 3406b ta15 v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v v out = 3.3v i load = 100ma to 600ma 3406b ta16
15 ltc3 4 0 6b-2 3406b2f u package descriptio s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) 1.50 ?1.75 (note 4) 2.80 bsc 0.30 ?0.45 typ 5 plcs (note 3) datum ? 0.09 ?0.20 (note 3) s5 tsot-23 0302 pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16 ltc3 4 0 6b-2 3406b2f related parts part number description comments lt1616 500ma (i out ), 1.4mhz, high efficiency step-down 90% efficiency, v in : 3.6v to 25v, v out(min) = 1.25v, i q = 1.9ma, dc/dc converter i sd < 1 m a, thinsot package lt1676 450ma (i out ), 100khz, high efficiency step-down 90% efficiency, v in : 7.4v to 60v, v out(min) = 1.24v, i q = 3.2ma, dc/dc converter i sd = 2.5 m a, s8 package ltc1877 600ma (i out ), 550khz, synchronous step-down 95% efficiency, v in : 2.7v to 10v, v out(min) = 0.8v, i q = 10 m a, dc/dc converter i sd < 1 m a, ms8 package ltc1878 600ma (i out ), 550khz, synchronous step-down 95% efficiency, v in : 2.7v to 6v, v out(min) = 0.8v, i q = 10 m a, dc/dc converter i sd < 1 m a, ms8 package ltc1879 1.2a (i out ), 550khz, synchronous step-down 95% efficiency, v in : 2.7v to 10v, v out(min) = 0.8v, i q = 15 m a, dc/dc converter i sd < 1 m a, tssop-16 package ltc3403 600ma (i out ), 1.5mhz, synchronous step-down 96% efficiency, v in : 2.5v to 5.5v, v out(min) = dynamically dc/dc converter with bypass transistor adjustable, i q = 20 m a, i sd < 1 m a, dfn package ltc3404 600ma (i out ), 1.4mhz, synchronous step-down 95% efficiency, v in : 2.7v to 6v, v out(min) = 0.8v, i q = 10 m a, dc/dc converter i sd < 1 m a, ms8 package ltc3405/ltc3405a 300ma (i out ), 1.5mhz, synchronous step-down 96% efficiency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 20 m a, dc/dc converter i sd < 1 m a, thinsot package ltc3406/ltc3406b 600ma (i out ), 1.5mhz, synchronous step-down 96% efficiency, v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 20 m a, dc/dc converter i sd < 1 m a, thinsot package ltc3407 dual output (600ma 2) 1.5mhz synchronous 95% efficiency v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 40 m a, step-down dc/dc converter ms10e package ltc3408 600ma (i out ), 1.5mhz synchronous step-down 96% efficiency, v in : 2.5v to 5.5v, v out(min) = dynamically dc/dc converter with 0.08 w bypass transistor adjustable, i q = 1.5ma, i sd < 1 m a, dfn package ltc3411 1.25a (i out ), 4mhz, synchronous step-down 95% efficiency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 60 m a, dc/dc converter i sd < 1 m a, ms package ltc3412 2.5a (i out ), 4mhz, synchronous step-down 95% efficiency, v in : 2.5v to 5.5v, v out(min) = 0.8v, i q = 60 m a, dc/dc converter i sd < 1 m a, tssop-16e package ltc3414 4a (i out ), 4mhz, synchronous step-down 95% efficiency, v in : 2.25v to 5.5v, v out(min) = 0.8v, i q = 64 m a, dc/dc converter tssop-20e package ltc3440 600ma (i out ), 2mhz, synchronous buck-boost 95% efficiency, v in : 2.5v to 5.5v, v out : 2.5v to 5.5v, i q = 25 m a, dc/dc converter i sd < 1 m a, ms package ltc3441 1a (i out ), 1mhz, synchronous buck-boost 95% efficiency, v in : 2.5v to 5.5v, v out : 2.4v to 5.25v, i q = 25 m a, dc/dc converter dfn package linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com ? linear technology corporation 2003 lt/tp 0204 1k ? printed in usa


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